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  M54HC165 m74hc165 september 1993 8 bit piso shift register b1r (plastic package) order codes : M54HC165f1r m74hc165m1r m74hc165b1r m74hc165c1r f1r (ceramic package) m1r (micro package) c1r (chip carrier) pin connections (top view) nc = no internal connection . high speed t pd = 15 ns (typ.) at v cc =5v . low power dissipation i cc =4 m a (max.) at t a =25 c . output drive capability 10 lsttl loads . balanced propagation delays t plh =t phl . symmetrical output impedance i ol = ? i oh ? = 4 ma (min.) . high noise immunity v nih =v nil =28%v cc (min.) . wide operating voltage range v cc (opr) = 2 v to 6 v . pin and function compatible with 54/74ls165 description the m54/74hc165 is a high speed cmos 8 bit piso shift register fabricated in silicon gate c 2 mos technology. it has the same high speed performance of lsttl combined with true cmos low power consumption. it achives the high speed operation similar to equivalent lsttl while maintaining the cmos low power dissipation. this device contains eight clocked master slave rs flip-flops connected as a shift register, with auxiliary gating to provide over-riding asynchronous parallel entry. parallel data entres when the shift/load input is low. the parallel data can change while shift/load is low, provided that the recommended set-up and hold times are observed. for clocked operation, shift/load must be high. the two clock input perform identically; one can be used as a clock inhibit by applying a high signal; to permit this operation clocking is accomplished through a 2 input nor gate. to avoid double clocking, however, the inhibit signal should only go high while the clock is high. otherwise the rising inhibit signal will cause the same response as rising clock edge. all inputs are equipped with protection circuits against static discharge and transient excess voltage. 1/13
input and output equivalent circuit truth table inputs internal outputs outpus shift/ clear clock inhibit clock serial in a .........h qa qb qh l x x x a............h a b h h l h x h qan qgn h l l x l qan qgn h l h x h qan qgn h l l x l qan qgn h x h x x no change h h x x x no change a.......h: the level of steady input voltage at inputs a through respectively qan - qgn : the level of qa -qg, respectively. before the most-recent transition of the clock. logic diagram m54/m74hc165 2/13
pin description pin no symbol name and function 1 s/l asynchronous parallel load input 2 qh complementary output 7 qh serial output 9 clock clock input (low to high edge triggered) 10 si serial data input 11, 12, 13, 14, 3, 4, 5, 6 a to h parallel data inputs 15 clock inh clock inhibit 8 gnd ground (0v) 16 v cc positive supply voltage iec logic symbol absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output source sink current per output pin 25 ma i cc or i gnd dc v cc or ground current 50 ma p d power dissipation 500 (*) mw t stg storage temperature -65 to +150 o c t l lead temperature (10 sec) 300 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition isnotimplied. (*) 500 mw: @ 65 o c derate to 300 mw by 10mw/ o c: 65 o cto85 o c recommended operating conditions symbol parameter value unit v cc supply voltage 2 to 6 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature: m54hc series m74hc series -55 to +125 -40 to +85 o c o c t r ,t f input rise and fall time v cc = 2 v 0 to 1000 ns v cc = 4.5 v 0 to 500 v cc = 6 v 0 to 400 m54/m74hc165 3/13
dc specifications symbol parameter test conditions value unit v cc (v) t a =25 o c 54hc and 74hc -40 to 85 o c 74hc -55 to 125 o c 54hc min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh high level output voltage 2.0 v i = v ih or v il i o =-20 m a 1.9 2.0 1.9 1.9 v 4.5 4.4 4.5 4.4 4.4 6.0 5.9 6.0 5.9 5.9 4.5 i o =-4.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-5.2 ma 5.68 5.8 5.63 5.60 v ol low level output voltage 2.0 v i = v ih or v il i o =20 m a 0.0 0.1 0.1 0.1 v 4.5 0.0 0.1 0.1 0.1 6.0 0.0 0.1 0.1 0.1 4.5 i o = 4.0 ma 0.17 0.26 0.33 0.40 6.0 i o = 5.2 ma 0.18 0.26 0.33 0.40 i i input leakage current 6.0 v i =v cc or gnd 0.1 1 1 m a i cc quiescent supply current 6.0 v i =v cc or gnd 4 40 80 m a m54/m74hc165 4/13
ac electrical characteristics (c l =50pf,inputt r =t f =6ns) symbol parameter test conditions value unit v cc (v) t a =25 o c 54hc and 74hc -40 to 85 o c 74hc -55 to 125 o c 54hc min. typ. max. min. max. min. max. t tlh t thl output transition time 2.0 30 75 95 110 ns 4.5 8151922 6.0 7131619 t plh t phl propagation delay time (ck - qh, qh) 2.0 55 150 190 225 ns 4.5 18 30 38 45 6.0 15 26 33 38 t plh t phl propagation delay time (s/l - qh, qh) 2.0 65 165 205 250 ns 4.5 21 33 41 50 6.0 18 28 35 43 t plh t phl propagation delay time (h - qh, qh) 2.0 52 135 170 205 ns 4.5 17 27 34 41 6.0 14 23 29 35 f max maximum clock frequency 2.0 7.4 15 6.0 4.8 mhz 4.5 37 60 30 24 6.0 44 71 35 28 t w(h) t w(l) minimum pulse width (ck) 2.0 24 75 95 110 ns 4.5 6151922 6.0 5131619 t w(l) minimum pulse width (s/l) 2.0 32 75 95 110 ns 4.5 8151922 6.0 7131619 t s minimum set-up time (pi - s/l) (si - ck) (s/l -ck) 2.0 24 75 95 110 ns 4.5 6151922 6.0 5131619 t h minimum hold time (s/l - pi) (ck - si) (ck - s/l) 2.0 0 0 0 ns 4.5 0 0 0 6.0 0 0 0 t rem minimum removal time (ck - ckinh) 2.0 20 75 95 110 ns 4.5 5151922 6.0 4131619 c in input capacitance 5 10 10 10 pf c pd (*) power dissipation capacitance 55 pf (*) c pd is defined as the value of the ic's internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operting current can be obtained by the following equation. i cc (opr) = c pd ? v cc ? f in +i cc m54/m74hc165 5/13
timing chart m54/m74hc165 6/13
switching characteristics test waveform serial mode parallel mode parallel mode parallel mode parallel mode m54/m74hc165 7/13
test circuit i cc (opr.) input waveform is the same as that in case of switching characteristics test. m54/m74hc165 8/13
plastic dip16 (0.25) mechanical data dim. mm inch min. typ. max. min. typ. max. a1 0.51 0.020 b 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 d 20 0.787 e 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 f 7.1 0.280 i 5.1 0.201 l 3.3 0.130 z 1.27 0.050 p001c m54/m74hc165 9/13
ceramic dip16/1 mechanical data dim. mm inch min. typ. max. min. typ. max. a 20 0.787 b 7 0.276 d 3.3 0.130 e 0.38 0.015 e3 17.78 0.700 f 2.29 2.79 0.090 0.110 g 0.4 0.55 0.016 0.022 h 1.17 1.52 0.046 0.060 l 0.22 0.31 0.009 0.012 m 0.51 1.27 0.020 0.050 n 10.3 0.406 p 7.8 8.05 0.307 0.317 q 5.08 0.200 p053d m54/m74hc165 10/13
so16 (narrow) mechanical data dim. mm inch min. typ. max. min. typ. max. a 1.75 0.068 a1 0.1 0.2 0.004 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 9.8 10 0.385 0.393 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.62 0.024 s8 (max.) p013h m54/m74hc165 11/13
plcc20 mechanical data dim. mm inch min. typ. max. min. typ. max. a 9.78 10.03 0.385 0.395 b 8.89 9.04 0.350 0.356 d 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 e 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 f 0.38 0.015 g 0.101 0.004 m 1.27 0.050 m1 1.14 0.045 p027a m54/m74hc165 12/13
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of sgs-thomson microelectonics. ? 1994 sgs-thomson microelectronics - all rights reserved sgs-thomson microelectronics group of companies australia - brazil - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a m54/m74hc165 13/13


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